The present invention relates generally to mixed voltage logic circuits, and, more particularly, to a level translator circuit.
Voltage level translators or level shifters are circuits that resolve voltage incompatibilities between different parts of a system that operate in different voltage domains, which is quite common in systems today, especially in systems that interface with legacy devices. Level shifters can be designed to span a wide range of voltages, frequencies, bit widths and IO types (open-drain or push-pull) at various performance levels. Level shifters also have been designed for standard interfaces, such as I2C bus, SD cards, and SIM cards.
For mobile devices, which operate using energy stored in a battery, low power and low leakage are important circuit design considerations. Today's mobile devices often include a SPMI (System Power Management Interface) bus, which is a 2-wire, bi-directional interface that passes signals (SDATA and SCLK) between multiple master devices and multiple slave devices.
It would be advantageous to have a fast, accurate level translator suitable for use with a SPMI bus.